mtk-20170518/target/linux/ar71xx/files/arch/mips/include, branch master MTK 20170518 : Mediatek SDK based on OpenWRT Barrier Breaker ar71xx: fix QCA955X SGMII link loss 2018-08-08T13:48:57+00:00 David Bauer mail@david-bauer.net 2018-08-06T14:15:04+00:00 f4f99ec9737c653815268f2efad0210caaa32e2d The QCA955X is affected by a hardware bug which causes link-loss of the SGMII link between SoC and PHY. This happens on change of link-state or speed. It is not really known what causes this bug. It definitely occurs when using a AR8033 Gigabit Ethernet PHY. Qualcomm solves this Bug in a similar fashion. We need to apply the fix on a per-device base via platform-data as performing the fixup work will break connectivity in case the SGMII interface is connected to a Switch. This bug was first proposed to be fixed by Sven Eckelmann in 2016. https://patchwork.ozlabs.org/patch/604782/ Based-on-patch-by: Sven Eckelmann <sven.eckelmann@open-mesh.com> Signed-off-by: David Bauer <mail@david-bauer.net> 
The QCA955X is affected by a hardware bug which causes link-loss of the
SGMII link between SoC and PHY. This happens on change of link-state or
speed.

It is not really known what causes this bug. It definitely occurs when
using a AR8033 Gigabit Ethernet PHY.

Qualcomm solves this Bug in a similar fashion. We need to apply the fix
on a per-device base via platform-data as performing the fixup work will
break connectivity in case the SGMII interface is connected to a Switch.

This bug was first proposed to be fixed by Sven Eckelmann in 2016.
 https://patchwork.ozlabs.org/patch/604782/

Based-on-patch-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
Signed-off-by: David Bauer <mail@david-bauer.net>
ar71xx: remove pdata->fifo_cfg* 2018-03-04T18:37:20+00:00 Felix Fietkau nbd@nbd.name 2018-03-02T20:30:10+00:00 f62d2b954970d40c577b70c22f522af046f26475 The values are the same for all chipsets that use it Signed-off-by: Felix Fietkau <nbd@nbd.name> 
The values are the same for all chipsets that use it

Signed-off-by: Felix Fietkau <nbd@nbd.name>
ag71xx: Fix rx ring buffer stall on small packets flood on qca956x and qca953x. 2017-12-29T14:17:07+00:00 Vittorio Gambaletta openwrt@vittgam.net 2017-03-25T17:08:02+00:00 d40a358136fdc19e6af13921867ed93444c08827 Backported from Code Aurora QSDK Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net> 
Backported from Code Aurora QSDK

Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net>
ar71xx: QCA956X: add missing register 2017-01-26T10:38:20+00:00 Henryk Heisig hyniu@o2.pl 2017-01-06T20:21:11+00:00 eec0c413759d360775df7419dec1bf46f6b63483 Signed-off-by: Henryk Heisig <hyniu@o2.pl> 
Signed-off-by: Henryk Heisig <hyniu@o2.pl>
ar71xx: remove a non-upstream spi core patch 2017-01-05T10:09:13+00:00 Felix Fietkau nbd@nbd.name 2016-12-29T00:07:34+00:00 af79fdbe4af32a287798b579141204bda056b8aa - use standard flags instead - remove dead code from the rb4xx spi drivers Signed-off-by: Felix Fietkau <nbd@nbd.name> 
- use standard flags instead
- remove dead code from the rb4xx spi drivers

Signed-off-by: Felix Fietkau <nbd@nbd.name>
ar71xx: rename ethernet pdata->builtin_switch to use_flow_control 2016-06-27T10:12:40+00:00 Felix Fietkau nbd@nbd.name 2016-06-27T08:02:58+00:00 75b2105cd3ba07039abe43b8565e5ef54b60e3fa Signed-off-by: Felix Fietkau <nbd@nbd.name> 
Signed-off-by: Felix Fietkau <nbd@nbd.name>
ar71xx: enable flow control for ethernet MACs with built-in switch 2016-06-26T09:21:17+00:00 Felix Fietkau nbd@nbd.name 2016-06-14T09:27:20+00:00 26b8db253745b0591bfffa21f02323428f11a88f Should fix LAN speed issues on some devices. This is an updated version of the previously reverted commit with the same name. It improves the check for MACs connected to a built-in switch Signed-off-by: Felix Fietkau <nbd@nbd.name> 
Should fix LAN speed issues on some devices. This is an updated version
of the previously reverted commit with the same name.
It improves the check for MACs connected to a built-in switch

Signed-off-by: Felix Fietkau <nbd@nbd.name>
ar71xx: ag71xx: get max_frame_len and desc_pktlen_mask from platform data 2013-12-20T11:41:17+00:00 Gabor Juhos juhosg@openwrt.org 2013-12-20T11:41:17+00:00 2c4e3cf33a67dd40f34171141f44dde55b8a55ff This will allow to use SoC specific values for both. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 39145 
This will allow to use SoC specific values for both.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 39145
ar71xx: implement callback in mdio reset 2013-12-17T22:14:10+00:00 Gabor Juhos juhosg@openwrt.org 2013-12-17T22:14:10+00:00 8b712436f37cea6b25e5a717042ab10b85fab3be This enables us to add fixups to the board specific code for boards that require special treatment of PHYs on mdio bus reset. Signed-off-by: Felix Kaechele <heffer@fedoraproject.org> http://patchwork.openwrt.org/patch/4614/ Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 39127 
This enables us to add fixups to the board specific code for boards that
require special treatment of PHYs on mdio bus reset.

Signed-off-by: Felix Kaechele <heffer@fedoraproject.org>
http://patchwork.openwrt.org/patch/4614/
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 39127
ar71xx: add dynamic MDIO clock calculation 2012-09-09T14:05:17+00:00 Gabor Juhos juhosg@openwrt.org 2012-09-09T14:05:17+00:00 759205777494fbf0b20eb9e133f4debb9e0d06ff SVN-Revision: 33342 
SVN-Revision: 33342