Without "syscon" being present in an ag71xx ethernet DT node's compatible property, a panic occurs at boot during probe citing "Unhandled kernel unaligned access". With this modification, the panic no longer occurs and instead the probe simply fails, allowing the boot process to continue. Signed-off-by: Matt Merhar <mattmerhar@protonmail.com>
We currently don't have any code configuring interface mode in ath79, meaning that we relies on bootloader to set the correct interface mode. This patch added code to set interface correctly so that everything works even if bootloader configures it wrong.(e.g. on WNDR3800 u-boot set the second GMAC mode to RMII but it should be RGMII.) Introduced "qca,mac-idx" for the difference in MII_CTRL register value. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Some AR9344 boards do very poorly with the default settings and need custom rxdv-delay, rxd-delay, txd-delay, txen-delay flags to perform reasonably. In this case the WD My Net Wi-Fi Range Extender can not even manage 10Mbps on a 1Gbit link: root@AR9344:~# iperf3 -s ----------------------------------------------------------- Server listening on 5201 ----------------------------------------------------------- Accepted connection from client [...] [ 5] local [...] connected to client [ ID] Interval Transfer Bitrate [ 5] 0.00-1.00 sec 1.09 MBytes 9.16 Mbits/sec [ 5] 1.00-2.00 sec 895 KBytes 7.33 Mbits/sec [ 5] 2.00-3.00 sec 762 KBytes 6.25 Mbits/sec [...] [ 5] 10.00-10.03 sec 17.0 KBytes 4.74 Mbits/sec - - - - - - - - - - - - - - - - - - - - - - - - - [ ID] Interval Transfer Bitrate [ 5] 0.00-10.03 sec 9.00 MBytes 7.52 Mbits/sec with but with the correct settings in place, it does much better: root@AR9344:~# iperf3 -s ----------------------------------------------------------- Server listening on 5201 ----------------------------------------------------------- Accepted connection from client [...] [ 5] local [...] connected to client [ ID] Interval Transfer Bitrate [ 5] 0.00-1.00 sec 23.1 MBytes 193 Mbits/sec [ 5] 1.00-2.00 sec 23.1 MBytes 194 Mbits/sec [ 5] 2.00-3.00 sec 23.2 MBytes 195 Mbits/sec [...] [ 5] 10.00-10.04 sec 710 KBytes 180 Mbits/sec - - - - - - - - - - - - - - - - - - - - - - - - - [ ID] Interval Transfer Bitrate [ 5] 0.00-10.04 sec 237 MBytes 198 Mbits/sec The tx data and enable delay bits definitions are taken from Atheros' AR9344 Data Sheet Section "8.6.1 Ethernet Configuration (ETH_CFG)" on page 153. Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
This commit adds the ability to configure the GMAC of the QCA956x. Signed-off-by: David Bauer <mail@david-bauer.net>
Currently speed value is applied to interface mode field. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Bit 8/12 of reset controller which is marked as PHY_RESET/SWITCH_RESET in datasheets will trigger either a reset for builtin switch or assert an external ETH0_RESET_L/ETH1_RESET_L pin, which are usually connected to external PHY/switch. None of them should be triggered every time an interface is brought up in ethernet driver. Remove PHY reset support from ag71xx and definition for them in dtsi. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
mdio bus isn't a standalone device on ar7240. (and maybe older SoCs?) Use simple-mfd for ar7241 and later SoCs to get mdio1 ready before gmac0 For ar7240 and older chips, manually create platform device after ag71xx_hw_init() in ag71xx_probe()to get mdio0 ready between ag71xx_hw_init() and ag71xx_phy_connect(). Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Allow specifying desired mdio clock frequency in dts. Use default frequency around 5MHz for builtin switch and 2MHz for other mdio bus. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This patch did several things: 1. Probe the builtin switch as a separated mdio device. 2. Register a separated mdio bus for builtin switch. 3. Use generic mdio read/write function instead of calling ag71xx_mdio_mii_read/write directly. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>