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<title>mtk-20170518/target/linux/ipq806x/files, branch master</title>
<subtitle>MTK 20170518 : Mediatek SDK based on OpenWRT Barrier Breaker</subtitle>
<link rel='alternate' type='text/html' href='http://www.chd.sx/cgit/mtk-20170518/'/>
<entry>
<title>ipq806x: add v4.9 support</title>
<updated>2017-02-16T19:25:32+00:00</updated>
<author>
<name>John Crispin</name>
<email>john@phrozen.org</email>
</author>
<published>2017-02-16T11:25:25+00:00</published>
<link rel='alternate' type='text/html' href='http://www.chd.sx/cgit/mtk-20170518/commit/?id=bb255f74290d889b65a563bac7a4be0427fdbec8'/>
<id>bb255f74290d889b65a563bac7a4be0427fdbec8</id>
<content type='text'>
Signed-off-by: John Crispin &lt;john@phrozen.org&gt;
</content>
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<pre>
Signed-off-by: John Crispin &lt;john@phrozen.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ipq806x: fixup nbg6817 internal mmc and switch configuration in DTS</title>
<updated>2017-02-02T21:48:33+00:00</updated>
<author>
<name>André Valentin</name>
<email>avalentin@marcant.net</email>
</author>
<published>2017-02-02T11:05:32+00:00</published>
<link rel='alternate' type='text/html' href='http://www.chd.sx/cgit/mtk-20170518/commit/?id=8725d1cffa66ed6c6fff1a255c02963cc0d714a9'/>
<id>8725d1cffa66ed6c6fff1a255c02963cc0d714a9</id>
<content type='text'>
The setting mmc-ddr-1_8v in the platform dts leads to read errors. The
device is unusable and system reboots in a loop. Because NBG6817 is the
only mmc device, I removed it in base dts.

The second change removes settings now present in base dts.

The third change references was a wrong conversion of constants in the switch settings.
Switch now initializes again.

Signed-off-by: André Valentin &lt;avalentin@marcant.net&gt;
</content>
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<pre>
The setting mmc-ddr-1_8v in the platform dts leads to read errors. The
device is unusable and system reboots in a loop. Because NBG6817 is the
only mmc device, I removed it in base dts.

The second change removes settings now present in base dts.

The third change references was a wrong conversion of constants in the switch settings.
Switch now initializes again.

Signed-off-by: André Valentin &lt;avalentin@marcant.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ipq806x: refactor ipq8065 device tree</title>
<updated>2017-01-15T19:56:30+00:00</updated>
<author>
<name>Pavel Kubelun</name>
<email>be.dissent@gmail.com</email>
</author>
<published>2017-01-14T14:01:09+00:00</published>
<link rel='alternate' type='text/html' href='http://www.chd.sx/cgit/mtk-20170518/commit/?id=8004aa313abb7eba1057b6d42e8710d38c2bc634'/>
<id>8004aa313abb7eba1057b6d42e8710d38c2bc634</id>
<content type='text'>
At the moment we have 2 seperate device tree sources: 1 for ipq8064 soc located
in kernel source and 1 custom in LEDE for ipq8065.
ipq8064 and ipq8065 SoCs are completely identical except ipq8065 has higher cpu
frequencies and adjusted corresponding power supply.

This commit makes ipq8065 DTS to contain only specific for ipq8065 DT entries while
pulling all the basic SoC stuff from ipq8064 DTS.

It makes easier to manage ipq806x device trees and instead of committing changes into
2 seperate equal DTS we are ending up with only 1.
It also enables ipq8065 devices to automatically receive changes made in upstream kernel.

Signed-off-by: Pavel Kubelun &lt;be.dissent@gmail.com&gt;
</content>
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<pre>
At the moment we have 2 seperate device tree sources: 1 for ipq8064 soc located
in kernel source and 1 custom in LEDE for ipq8065.
ipq8064 and ipq8065 SoCs are completely identical except ipq8065 has higher cpu
frequencies and adjusted corresponding power supply.

This commit makes ipq8065 DTS to contain only specific for ipq8065 DT entries while
pulling all the basic SoC stuff from ipq8064 DTS.

It makes easier to manage ipq806x device trees and instead of committing changes into
2 seperate equal DTS we are ending up with only 1.
It also enables ipq8065 devices to automatically receive changes made in upstream kernel.

Signed-off-by: Pavel Kubelun &lt;be.dissent@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ipq806x: update eMMC and SDCC3 nodes in device tree</title>
<updated>2017-01-15T19:56:30+00:00</updated>
<author>
<name>Pavel Kubelun</name>
<email>be.dissent@gmail.com</email>
</author>
<published>2016-12-28T13:21:43+00:00</published>
<link rel='alternate' type='text/html' href='http://www.chd.sx/cgit/mtk-20170518/commit/?id=44b44595dcf3863e8673c801ec4a74cc540e770b'/>
<id>44b44595dcf3863e8673c801ec4a74cc540e770b</id>
<content type='text'>
Enable bam dma support for eMMC and SDCC3 in device tree and update nodes
to reflect Qualcomm SDK.

Signed-off-by: Pavel Kubelun &lt;be.dissent@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Enable bam dma support for eMMC and SDCC3 in device tree and update nodes
to reflect Qualcomm SDK.

Signed-off-by: Pavel Kubelun &lt;be.dissent@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ipq806x: disable usb3 phy suspend and add usb tcsr control</title>
<updated>2017-01-15T19:56:30+00:00</updated>
<author>
<name>Pavel Kubelun</name>
<email>be.dissent@gmail.com</email>
</author>
<published>2016-12-23T22:51:07+00:00</published>
<link rel='alternate' type='text/html' href='http://www.chd.sx/cgit/mtk-20170518/commit/?id=45bf3d4f248ea2d770a1625fdee8899dc40329af'/>
<id>45bf3d4f248ea2d770a1625fdee8899dc40329af</id>
<content type='text'>
According to Qualcomm SDK usb3 phy suspend should be disabled for
ipq806x.
This may solve issue on some ipq806x devices that breaks usb3
storage peripherals during system boot.

Signed-off-by: Pavel Kubelun &lt;be.dissent@gmail.com&gt;
</content>
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<pre>
According to Qualcomm SDK usb3 phy suspend should be disabled for
ipq806x.
This may solve issue on some ipq806x devices that breaks usb3
storage peripherals during system boot.

Signed-off-by: Pavel Kubelun &lt;be.dissent@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ipq806x: fix pvs1_bin voltage in ipq8065 DT</title>
<updated>2017-01-10T07:11:14+00:00</updated>
<author>
<name>Pavel Kubelun</name>
<email>be.dissent@gmail.com</email>
</author>
<published>2016-12-22T09:17:25+00:00</published>
<link rel='alternate' type='text/html' href='http://www.chd.sx/cgit/mtk-20170518/commit/?id=6ebb46a40a246f986f4ed6f1de43beb4268f8167'/>
<id>6ebb46a40a246f986f4ed6f1de43beb4268f8167</id>
<content type='text'>
Fixing pvs1 bin voltage as found in GPL tarball and Qualcomm SDK.

Also adjusting smb208_s2a/b minimum voltage to reflect lowest value in pvs table.

Current ipq8065 devices in LEDE choose (based on eFuse data) pvs bin n4, that has
correct values in DT, but in future a new device may choose n1 or n6.

Without this change n1 is semi-correct and n6 is not available, because OPP driver
disregards bins with voltage values that regulator cannot supply.

Signed-off-by: Pavel Kubelun &lt;be.dissent@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fixing pvs1 bin voltage as found in GPL tarball and Qualcomm SDK.

Also adjusting smb208_s2a/b minimum voltage to reflect lowest value in pvs table.

Current ipq8065 devices in LEDE choose (based on eFuse data) pvs bin n4, that has
correct values in DT, but in future a new device may choose n1 or n6.

Without this change n1 is semi-correct and n6 is not available, because OPP driver
disregards bins with voltage values that regulator cannot supply.

Signed-off-by: Pavel Kubelun &lt;be.dissent@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ipq806x: add thermal sensor driver</title>
<updated>2016-12-01T14:47:43+00:00</updated>
<author>
<name>dissent1</name>
<email>be.dissent+github@gmail.com</email>
</author>
<published>2016-11-05T13:15:33+00:00</published>
<link rel='alternate' type='text/html' href='http://www.chd.sx/cgit/mtk-20170518/commit/?id=fef6a96d9e9e001a28b6a673c56ed79029457b5d'/>
<id>fef6a96d9e9e001a28b6a673c56ed79029457b5d</id>
<content type='text'>
Allows to check cpu temperature.

Huge thanks to @hnyman for valuable assistance!

Signed-off-by: Pavel Kubelun &lt;be.dissent@gmail.com&gt;
</content>
<content type='xhtml'>
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<pre>
Allows to check cpu temperature.

Huge thanks to @hnyman for valuable assistance!

Signed-off-by: Pavel Kubelun &lt;be.dissent@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ipq806x: more dts cleanup</title>
<updated>2016-11-27T14:33:54+00:00</updated>
<author>
<name>Mathias Kresin</name>
<email>dev@kresin.me</email>
</author>
<published>2016-11-26T09:20:03+00:00</published>
<link rel='alternate' type='text/html' href='http://www.chd.sx/cgit/mtk-20170518/commit/?id=3228c2a682f287337db3dda880bc1e35ebaa7ce9'/>
<id>3228c2a682f287337db3dda880bc1e35ebaa7ce9</id>
<content type='text'>
Remove the wifi5g LED from the the d7800, r7500 and r7800. Albeit this
GPIO is mentioned in the GPL tarball, it doesn't do anything. The
2.4/5 GHz LEDs are connected to the wifi chips and not be controlled
from the the userspace.

Use the LEDs names/colours as they are used in the board manuals. Merge
redundant LED configurations. Use the phy[0|1]tpt trigger for the
wireless LEDs. Remove the workarounds for the not controllable wireless
LEDs.

Fix spi compatible strings and remove superfluous spi-max-frequency
parameters.

If there are two power leds, use one for indicating normal operation and
one for failsafe/upgrade. Keep the on/off state of the main power led
during boot.

Use the usb pinmux settings from the nbg6817 gpl sources.

Signed-off-by: Mathias Kresin &lt;dev@kresin.me&gt;
</content>
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<pre>
Remove the wifi5g LED from the the d7800, r7500 and r7800. Albeit this
GPIO is mentioned in the GPL tarball, it doesn't do anything. The
2.4/5 GHz LEDs are connected to the wifi chips and not be controlled
from the the userspace.

Use the LEDs names/colours as they are used in the board manuals. Merge
redundant LED configurations. Use the phy[0|1]tpt trigger for the
wireless LEDs. Remove the workarounds for the not controllable wireless
LEDs.

Fix spi compatible strings and remove superfluous spi-max-frequency
parameters.

If there are two power leds, use one for indicating normal operation and
one for failsafe/upgrade. Keep the on/off state of the main power led
during boot.

Use the usb pinmux settings from the nbg6817 gpl sources.

Signed-off-by: Mathias Kresin &lt;dev@kresin.me&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ipq806x: clean up dts files</title>
<updated>2016-11-27T14:24:59+00:00</updated>
<author>
<name>Henryk Heisig</name>
<email>hyniu@o2.pl</email>
</author>
<published>2016-11-21T20:04:52+00:00</published>
<link rel='alternate' type='text/html' href='http://www.chd.sx/cgit/mtk-20170518/commit/?id=e3caadc69d405a74f9643134bc5074607f2a999b'/>
<id>e3caadc69d405a74f9643134bc5074607f2a999b</id>
<content type='text'>
Set the pinmux to the values found in the GPL tarballs of the boards.
Remove pinmux which are is not used (like nand pinmux for spi
flash boards).

This allows to use the wan orange led of the C2600 which had a wrong
pinmux before. Might fix buttons or leds of other boards as well.

Fix the LED color and the ledswitch key code of the C2600. Rename the
ledgnr to ledswitch.

Add support for indication the boot state using LEDs to the D7800,
NBG6817, R7500 and R7500v2.

Change GPIO active to readable values in D7800, EA8500, R7500,
R7500v2 and R7800.

Change gpioexport to gpio pinmux.

Add proper "drive strenght" to i2c4_pins and use it for RPM on
C2600, D7800, EA8500, R7500, R7500v2.

Remove pcie pinmux from D7800.

Move pinctrl to correct place in NBG6817 and R7800.

Signed-off-by: Henryk Heisig &lt;hyniu@o2.pl&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Set the pinmux to the values found in the GPL tarballs of the boards.
Remove pinmux which are is not used (like nand pinmux for spi
flash boards).

This allows to use the wan orange led of the C2600 which had a wrong
pinmux before. Might fix buttons or leds of other boards as well.

Fix the LED color and the ledswitch key code of the C2600. Rename the
ledgnr to ledswitch.

Add support for indication the boot state using LEDs to the D7800,
NBG6817, R7500 and R7500v2.

Change GPIO active to readable values in D7800, EA8500, R7500,
R7500v2 and R7800.

Change gpioexport to gpio pinmux.

Add proper "drive strenght" to i2c4_pins and use it for RPM on
C2600, D7800, EA8500, R7500, R7500v2.

Remove pcie pinmux from D7800.

Move pinctrl to correct place in NBG6817 and R7800.

Signed-off-by: Henryk Heisig &lt;hyniu@o2.pl&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ipq806x: add support for TP-Link Archer VR2600v</title>
<updated>2016-11-24T21:37:40+00:00</updated>
<author>
<name>Sebastian Quilitz</name>
<email>zeraphim@x-pantion.de</email>
</author>
<published>2016-11-23T17:51:15+00:00</published>
<link rel='alternate' type='text/html' href='http://www.chd.sx/cgit/mtk-20170518/commit/?id=ae79c41286f0d9a97f2641450240ecac5465677d'/>
<id>ae79c41286f0d9a97f2641450240ecac5465677d</id>
<content type='text'>
This router is similar to the C2600. Ethernet on WAN + LAN, switch,
sysupgrade, LEDs, buttons and WiFi on 2G + 5G do work. The xDSL modem
and the POTS/DECT interface are not supported yet.

It is not possible to flash LEDE via the TP-Link webinterface. The
image need to be signed. The first 0x200 bytes of the image is the
TP-Link header including the signature. The signature is not validated
by the bootloader. The LEDE image is zeroed in this area.

To install LEDE it is necessary to solder a four pin header to JP2.
Connect a serial interface to this header and interrupt the autostart
of kernel. Transfer the sysupgrade image via TFTP and write it to the
serial flash at 0x320000.

Signed-off-by: Sebastian Quilitz &lt;zeraphim@x-pantion.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This router is similar to the C2600. Ethernet on WAN + LAN, switch,
sysupgrade, LEDs, buttons and WiFi on 2G + 5G do work. The xDSL modem
and the POTS/DECT interface are not supported yet.

It is not possible to flash LEDE via the TP-Link webinterface. The
image need to be signed. The first 0x200 bytes of the image is the
TP-Link header including the signature. The signature is not validated
by the bootloader. The LEDE image is zeroed in this area.

To install LEDE it is necessary to solder a four pin header to JP2.
Connect a serial interface to this header and interrupt the autostart
of kernel. Transfer the sysupgrade image via TFTP and write it to the
serial flash at 0x320000.

Signed-off-by: Sebastian Quilitz &lt;zeraphim@x-pantion.de&gt;
</pre>
</div>
</content>
</entry>
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