The pinmux for all SoCs using this driver is now set via the pinmux. It
makes this code obsolete.

Some of the code targeting the mt76x8 SoCs is still required. The sd
card pins share the pads with the EPHY. These pads need to be switched
to digital mode if the pins are used for sd cards.

The eMMC 8-bit mode has to be enabled via pinmux instead of a kernel
option. The uart2 group need to be set to function "sdxc d5 d4", pwm1
to "sdxc d6" and pwm0 to "sdxc d7" to do so. It can't be done by as
part of a default pinmux, as it would break the normal operation of
uart2.

Signed-off-by: Mathias Kresin <dev@kresin.me>

A buffer is split into multiple descriptors if it exceeds 16 KB.
Apply the same split for the skb head as well (to deal with corner cases
on fraglist support)

Signed-off-by: Felix Fietkau <nbd@nbd.name>

This reverts commit 3a8efaef00d6b7317c46fe6b7e923912d8bf3500.

The change reportedly breaks UART2 on some boards. Furthermore it uses
bitwise logic on an uninitialized variable and fails to explain what it
is fixing exactly.

Signed-off-by: Jo-Philipp Wich <jo@mein.io>

Fix the indent to make the make it obvious which condition is the
parent of the loop.

Signed-off-by: Mathias Kresin <dev@kresin.me>

This patch make all mt7620 ephy ports turned on.
It is necessary for some JBOOT devices.

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>

To share mdio addr for IntPHY and ExtPHY,
as described in the documentation (MT7620_ProgrammingGuide.pdf).
(refer: http://download.villagetelco.org/hardware/MT7620/MT7620_ProgrammingGuide.pdf)

when port4 setup to work as gmac mode, dts like:

&gsw {
    mediatek,port4 = "gmac";
};

we should set SYSCFG1.GE2_MODE==0x0 (RGMII).
but SYSCFG1.GE2_MODE may have been set to 3(RJ-45) by uboot/default
so we need to re-set it to 0x0

before this changes:
gsw: 4FE + 2GE may not work correctly and MDIO addr 4 cannot be used by ExtPHY

after this changes:
gsw: 4FE + 2GE works and MDIO addr 4 can be used by ExtPHY

Signed-off-by: Chen Minqiang <ptpt52@gmail.com>

When PHY's are defined on the MDIO bus in the DTS, gigabit support was
being masked out for no apparent reason, pegging all such ports to 10/100.
If gigabit support must be disabled for some reason, there should be a
"max-speed" property in the DTS.

Reported-by: James McKenzie <openwrt@madingley.org>
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>

Mediatek has a reference platform that pairs an MT7620A with an MT7530W,
where the latter responds on MDIO address 0x1f while both chips respond on
0x0 to 0x4. The driver special-cases this arrangement to make sure it's
talking to the right chip, but two different ways in two different places.
This patch consolidates the detection without the current requirement of
both tests to be separately satisfied in the DTS.

Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>

There is another thing about crc to do when initialize SD card on
MT7628.
This commit is to fix this init issue.

Signed-off-by: LoveSy <shana@zju.edu.cn>

The code has some remaining issues that cause ethernet hangs, so
disable it for now until we can get it fixed

Signed-off-by: Felix Fietkau <nbd@nbd.name>