diff options
Diffstat (limited to 'target/linux/brcm2708/patches-4.4/0434-clk-bcm2835-Add-an-enum-for-the-DSI1-pixel-clock.patch')
| -rw-r--r-- | target/linux/brcm2708/patches-4.4/0434-clk-bcm2835-Add-an-enum-for-the-DSI1-pixel-clock.patch | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target/linux/brcm2708/patches-4.4/0434-clk-bcm2835-Add-an-enum-for-the-DSI1-pixel-clock.patch b/target/linux/brcm2708/patches-4.4/0434-clk-bcm2835-Add-an-enum-for-the-DSI1-pixel-clock.patch index ad29003..e3a4d8c 100644 --- a/target/linux/brcm2708/patches-4.4/0434-clk-bcm2835-Add-an-enum-for-the-DSI1-pixel-clock.patch +++ b/target/linux/brcm2708/patches-4.4/0434-clk-bcm2835-Add-an-enum-for-the-DSI1-pixel-clock.patch @@ -11,7 +11,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net> --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -940,6 +940,9 @@ static long bcm2835_clock_rate_from_divi +@@ -942,6 +942,9 @@ static long bcm2835_clock_rate_from_divi const struct bcm2835_clock_data *data = clock->data; u64 temp; @@ -21,7 +21,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net> /* * The divisor is a 12.12 fixed point field, but only some of * the bits are populated in any given clock. -@@ -963,7 +966,12 @@ static unsigned long bcm2835_clock_get_r +@@ -965,7 +968,12 @@ static unsigned long bcm2835_clock_get_r struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); struct bcm2835_cprman *cprman = clock->cprman; const struct bcm2835_clock_data *data = clock->data; @@ -35,7 +35,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net> return bcm2835_clock_rate_from_divisor(clock, parent_rate, div); } -@@ -1409,6 +1417,28 @@ static const char *const bcm2835_clock_v +@@ -1411,6 +1419,28 @@ static const char *const bcm2835_clock_v __VA_ARGS__) /* @@ -64,7 +64,7 @@ Signed-off-by: Eric Anholt <eric@anholt.net> * the real definition of all the pll, pll_dividers and clocks * these make use of the above REGISTER_* macros */ -@@ -1853,7 +1883,12 @@ static const struct bcm2835_clk_desc clk +@@ -1855,7 +1885,12 @@ static const struct bcm2835_clk_desc clk .div_reg = CM_DSI1EDIV, .int_bits = 4, .frac_bits = 8), |