From 9ef47853643cd78f497d58bb6b6f758d2008e081 Mon Sep 17 00:00:00 2001 From: Gabor Juhos Date: Sun, 27 Mar 2011 19:19:59 +0000 Subject: ramips: define GPIO chips separately for each SoCs SVN-Revision: 26326 --- .../files/arch/mips/include/asm/mach-ralink/rt288x/ralink_soc.h | 6 ------ .../ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h | 1 + .../files/arch/mips/include/asm/mach-ralink/rt305x/ralink_soc.h | 6 ------ .../ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h | 2 ++ 4 files changed, 3 insertions(+), 12 deletions(-) (limited to 'target/linux/ramips/files/arch/mips/include') diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x/ralink_soc.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x/ralink_soc.h index 60ca647..73301e2 100644 --- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x/ralink_soc.h +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x/ralink_soc.h @@ -15,10 +15,4 @@ #define RALINK_SOC_MEM_SIZE_MIN (2 * 1024 * 1024) #define RALINK_SOC_MEM_SIZE_MAX (128 * 1024 * 1024) -#define RALINK_SOC_GPIO_BASE 0x300600 - -#define RALINK_SOC_GPIO0_COUNT 24 -#define RALINK_SOC_GPIO1_COUNT 16 -#define RALINK_SOC_GPIO2_COUNT 32 - #endif /* __RT288X_RALINK_SOC_H */ diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h index a95cb82..2ae26ef 100644 --- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x_regs.h @@ -37,6 +37,7 @@ #define RT2880_INTC_SIZE 0x100 #define RT2880_MEMC_SIZE 0x100 #define RT2880_UART0_SIZE 0x100 +#define RT2880_PIO_SIZE 0x100 #define RT2880_UART1_SIZE 0x100 #define RT2880_FLASH1_SIZE (16 * 1024 * 1024) #define RT2880_FLASH0_SIZE (4 * 1024 * 1024) diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x/ralink_soc.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x/ralink_soc.h index fd0e8b3..c3206ec 100644 --- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x/ralink_soc.h +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x/ralink_soc.h @@ -15,10 +15,4 @@ #define RALINK_SOC_MEM_SIZE_MIN (2 * 1024 * 1024) #define RALINK_SOC_MEM_SIZE_MAX (64 * 1024 * 1024) -#define RALINK_SOC_GPIO_BASE 0x10000600 - -#define RALINK_SOC_GPIO0_COUNT 24 -#define RALINK_SOC_GPIO1_COUNT 16 -#define RALINK_SOC_GPIO2_COUNT 12 - #endif /* __RT288X_RALINK_SOC_H */ diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h index c4964b0..5970f78 100644 --- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h @@ -20,6 +20,7 @@ #define RT305X_MEMC_BASE 0x10000300 #define RT305X_PCM_BASE 0x10000400 #define RT305X_UART0_BASE 0x10000500 +#define RT305X_PIO_BASE 0x10000600 #define RT305X_GDMA_BASE 0x10000700 #define RT305X_NANDC_BASE 0x10000800 #define RT305X_I2C_BASE 0x10000900 @@ -39,6 +40,7 @@ #define RT305X_INTC_SIZE 0x100 #define RT305X_MEMC_SIZE 0x100 #define RT305X_UART0_SIZE 0x100 +#define RT305X_PIO_SIZE 0x100 #define RT305X_UART1_SIZE 0x100 #define RT305X_FLASH1_SIZE (16 * 1024 * 1024) #define RT305X_FLASH0_SIZE (8 * 1024 * 1024) -- cgit v1.1