diff options
| author | Florian Fainelli <florian@openwrt.org> | 2009-06-27 20:32:43 +0000 |
|---|---|---|
| committer | Florian Fainelli <florian@openwrt.org> | 2009-06-27 20:32:43 +0000 |
| commit | ca5de76ed31cab9c83cfeaaa3452acdd2ae14157 (patch) | |
| tree | 1cfb46ab86da8652451b16621d956d32bd71ae6d /target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h | |
| parent | 5899460ebfd34caa757767cdcb1ac5264045f891 (diff) | |
| download | mtk-20170518-ca5de76ed31cab9c83cfeaaa3452acdd2ae14157.zip mtk-20170518-ca5de76ed31cab9c83cfeaaa3452acdd2ae14157.tar.gz mtk-20170518-ca5de76ed31cab9c83cfeaaa3452acdd2ae14157.tar.bz2 | |
more fixes for bcm6338, no need not to prevent reads from MPI registers now that we have it defined correctly
SVN-Revision: 16589
Diffstat (limited to 'target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h')
| -rw-r--r-- | target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h b/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h index 6209f47..58ed270 100644 --- a/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h +++ b/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h @@ -123,7 +123,7 @@ enum bcm63xx_regs_set { #define BCM_6338_DSL_LMEM_BASE (0xfff00000) #define BCM_6338_PERF_BASE (0xfffe0000) -#define BCM_6338_BB_BASE (0xdeadbeef) +#define BCM_6338_BB_BASE (0xfffe0100) #define BCM_6338_TIMER_BASE (0xfffe0200) #define BCM_6338_WDT_BASE (0xfffe021c) #define BCM_6338_UART0_BASE (0xfffe0300) @@ -132,9 +132,9 @@ enum bcm63xx_regs_set { #define BCM_6338_UDC0_BASE (0xdeadbeef) #define BCM_6338_USBDMA_BASE (0xfffe2400) #define BCM_6338_OHCI0_BASE (0xdeadbeef) -#define BCM_6338_OHCI_PRIV_BASE (0xdeadbeef) +#define BCM_6338_OHCI_PRIV_BASE (0xfffe3000) #define BCM_6338_USBH_PRIV_BASE (0xdeadbeef) -#define BCM_6338_MPI_BASE (0xdeadbeef) +#define BCM_6338_MPI_BASE (0xfffe3160) #define BCM_6338_PCMCIA_BASE (0xdeadbeef) #define BCM_6338_SDRAM_REGS_BASE (0xfffe3100) #define BCM_6338_DSL_BASE (0xfffe1000) @@ -142,7 +142,7 @@ enum bcm63xx_regs_set { #define BCM_6338_UBUS_BASE (0xdeadbeef) #define BCM_6338_ENET0_BASE (0xfffe2800) #define BCM_6338_ENET1_BASE (0xdeadbeef) -#define BCM_6338_ENETDMA_BASE (0xfffe3800) +#define BCM_6338_ENETDMA_BASE (0xfffe2400) #define BCM_6338_EHCI0_BASE (0xdeadbeef) #define BCM_6338_SDRAM_BASE (0xfffe3100) #define BCM_6338_MEMC_BASE (0xdeadbeef) |