ipq806x: Add support for IPQ806x chip family

Patches are generated using the "format-patch" command from the
following location:
*https://www.codeaurora.org/cgit/quic/kernel/galak-msm/log/?h=apq_ipq_base
*rev=0771849495b4128cac2faf7d49c85c729fc48b20
Patches numbered 76/77/102/103 have already been integrated in 3.14.12,
so they're not in this list.

All these patches are either integrated are pending integration into
kernel.org, therefore these patches should go away once the kernel
gets upgraded to 3.16.

Support is currently limited to AP148 board but can be extended to other
platforms in the future.

These changes do not cover ethernet connectivity.

Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>

SVN-Revision: 42334

1 files changed, 69 insertions, 0 deletions

diff --git a/target/linux/ipq806x/patches/0068-spi-qup-Convert-ot-let-spi-core-handle-checking-tran.patch b/target/linux/ipq806x/patches/0068-spi-qup-Convert-ot-let-spi-core-handle-checking-tran.patch
new file mode 100644
index 0000000..6914d44
--- /dev/null
+++ b/target/linux/ipq806x/patches/0068-spi-qup-Convert-ot-let-spi-core-handle-checking-tran.patch
@@ -0,0 +1,69 @@
+From a4b122f945c564e47a42a9665b484785e86648de Mon Sep 17 00:00:00 2001
+From: Axel Lin <axel.lin@ingics.com>
+Date: Fri, 21 Feb 2014 09:34:16 +0800
+Subject: [PATCH 068/182] spi: qup: Convert ot let spi core handle checking
+ transfer speed
+
+Set master->max_speed_hz then spi core will handle checking transfer speed.
+So we can remove the same checking in this driver.
+
+Also remove checking spi->chip_select in spi_qup_setup(), the checking is done
+by spi core.
+
+Signed-off-by: Axel Lin <axel.lin@ingics.com>
+Acked-by: Ivan T. Ivanov <iivanov@mm-sol.com>
+Signed-off-by: Mark Brown <broonie@linaro.org>
+---
+ drivers/spi/spi-qup.c |   15 +--------------
+ 1 file changed, 1 insertion(+), 14 deletions(-)
+
+diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c
+index 5edc56f..dec339d 100644
+--- a/drivers/spi/spi-qup.c
++++ b/drivers/spi/spi-qup.c
+@@ -134,7 +134,6 @@ struct spi_qup {
+ 	struct clk		*cclk;	/* core clock */
+ 	struct clk		*iclk;	/* interface clock */
+ 	int			irq;
+-	u32			max_speed_hz;
+ 	spinlock_t		lock;
+ 
+ 	int			in_fifo_sz;
+@@ -517,18 +516,6 @@ static int spi_qup_setup(struct spi_device *spi)
+ 	struct spi_qup *controller = spi_master_get_devdata(spi->master);
+ 	struct spi_qup_device *chip = spi_get_ctldata(spi);
+ 
+-	if (spi->chip_select >= spi->master->num_chipselect) {
+-		dev_err(controller->dev, "invalid chip_select %d\n",
+-			spi->chip_select);
+-		return -EINVAL;
+-	}
+-
+-	if (spi->max_speed_hz > controller->max_speed_hz) {
+-		dev_err(controller->dev, "invalid max_speed_hz %d\n",
+-			spi->max_speed_hz);
+-		return -EINVAL;
+-	}
+-
+ 	if (!chip) {
+ 		/* First setup */
+ 		chip = kzalloc(sizeof(*chip), GFP_KERNEL);
+@@ -629,6 +616,7 @@ static int spi_qup_probe(struct platform_device *pdev)
+ 	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP;
+ 	master->num_chipselect = SPI_NUM_CHIPSELECTS;
+ 	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
++	master->max_speed_hz = max_freq;
+ 	master->setup = spi_qup_setup;
+ 	master->cleanup = spi_qup_cleanup;
+ 	master->set_cs = spi_qup_set_cs;
+@@ -645,7 +633,6 @@ static int spi_qup_probe(struct platform_device *pdev)
+ 	controller->iclk = iclk;
+ 	controller->cclk = cclk;
+ 	controller->irq = irq;
+-	controller->max_speed_hz = max_freq;
+ 
+ 	spin_lock_init(&controller->lock);
+ 	init_completion(&controller->done);
+-- 
+1.7.10.4
+